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Built-in Elements

<breakout />

Overview

A <breakout /> is a transparent routing container similar to a <group />. It does not create a subcircuit, selector scope, or private net scope. Instead, its routing properties guide the autorouter on where connections should exit the region. Inside a breakout you can place <breakoutpoint /> elements to define explicit exit locations, or let tscircuit generate breakout points for connections that leave the breakout.

This 100-pin BGA keeps two 8-bit buses on contiguous outer columns and assigns each bus an explicit fanout direction. Eight center-region balls connect to GND and VCC pours on separate inner layers.

PCB Circuit Preview
const buses = [
{
name: "DATA",
signals: [
"DATA0",
"DATA1",
"DATA2",
"DATA3",
"DATA4",
"DATA5",
"DATA6",
"DATA7",
],
pins: [20, 30, 40, 50, 60, 70, 80, 90],
targetX: 5.75,
},
{
name: "ADDRESS",
signals: [
"ADDR0",
"ADDR1",
"ADDR2",
"ADDR3",
"ADDR4",
"ADDR5",
"ADDR6",
"ADDR7",
],
pins: [11, 21, 31, 41, 51, 61, 71, 81],
targetX: -5.75,
},
]

const powerDrops = [
{ pin: 44, name: "GND_44", net: "GND" },
{ pin: 45, name: "VCC_45", net: "VCC" },
{ pin: 46, name: "GND_46", net: "GND" },
{ pin: 47, name: "VCC_47", net: "VCC" },
{ pin: 54, name: "VCC_54", net: "VCC" },
{ pin: 55, name: "GND_55", net: "GND" },
{ pin: 56, name: "VCC_56", net: "VCC" },
{ pin: 57, name: "GND_57", net: "GND" },
]

const fanoutExitYs = [
-1.2, -0.625, -0.375, -0.125, 0.125, 0.375, 0.625, 1.2,
]

const bgaPinLabels = Object.fromEntries([
...buses.flatMap((bus) =>
bus.signals.map((signal, index) => [
"pin" + bus.pins[index],
signal,
]),
),
...powerDrops.map((drop) => ["pin" + drop.pin, drop.name]),
])

export default () => (
<board
width="18mm"
height="12mm"
layers={6}
minTraceWidth="0.1mm"
defaultTraceWidth="0.1mm"
minTraceToPadEdgeClearance="0.1mm"
minViaEdgeToPadEdgeClearance="0.1mm"
minViaHoleDiameter="0.2mm"
minViaPadDiameter="0.5mm"
>
<copperpour layer="inner1" connectsTo="net.GND" />
<copperpour layer="inner2" connectsTo="net.VCC" />
<breakout
name="BGA_BREAKOUT"
width="14mm"
height="11mm"
fanoutRoutingLayers={["top"]}
fanoutBoundaryPadding="1.5mm"
fanoutPourNetMap={{ inner1: "GND", inner2: "VCC" }}
busFanoutDirections={{
DATA: "center_right",
ADDRESS: "center_left",
}}
>
<chip
name="U1"
footprint="bga100_grid10x10_p0.8mm_pad0.35mm_circularpads"
pinLabels={bgaPinLabels}
/>
{buses.map((bus) => (
<chip
key={"EDGE_" + bus.name}
name={"EDGE_" + bus.name}
pcbX={bus.targetX}
pinLabels={Object.fromEntries(
bus.signals.map((signal, index) => [
"pin" + (index + 1),
signal,
]),
)}
footprint={
<footprint>
{fanoutExitYs.map((pcbY, index) => (
<smtpad
key={"pin" + (index + 1)}
portHints={["pin" + (index + 1)]}
pcbX={0}
pcbY={pcbY}
width="0.4mm"
height="0.1mm"
shape="rect"
/>
))}
</footprint>
}
/>
))}
{buses.map((bus) => (
<bus
key={bus.name}
name={bus.name}
connections={bus.signals.map(
(signal) => bus.name + "_" + signal,
)}
/>
))}
{buses.flatMap((bus) =>
bus.signals.map((signal) => (
<trace
key={signal}
name={bus.name + "_" + signal}
from={"U1." + signal}
to={"EDGE_" + bus.name + "." + signal}
/>
)),
)}
{powerDrops.map((drop) => (
<trace
key={drop.name}
name={drop.name}
from={"U1." + drop.name}
to={"net." + drop.net}
/>
))}
</breakout>
</board>
)

The breakout uses the fanout autorouter by default, so its fanout controls can be set directly on <breakout />. busFanoutDirections sends each named bus toward a specific side.

Because <breakout /> is transparent, its traces use the same GND and VCC nets as the board-level copper pours. The pours do not need to be children of the breakout, and no net exposure or separate <autoroutingphase /> is required.

fanoutRoutingLayers={["top"]} reserves the top layer for signal escape. The GND and VCC traces have only one component endpoint, so fanoutPourNetMap drops them to inner1 and inner2. Those plane layers do not need to appear in fanoutRoutingLayers.

When fanoutPourNetMap is omitted, tscircuit infers the plane destinations from matching <copperpour /> elements on the enclosing board. An explicit map is useful when a net has pours on multiple layers:

<breakout
fanoutRoutingLayers={["top"]}
fanoutPourNetMap={{ inner1: "GND", inner2: "VCC" }}
>
{/* BGA, buses, and traces */}
</breakout>

Properties

<breakout /> accepts all the layout properties of <group /> plus a few extras:

PropertyDescription
paddingUniform padding around the breakout region.
paddingLeft / paddingRight / paddingTop / paddingBottomControl padding for each side individually.
autorouterAutorouter used to escape components inside the breakout. Defaults to fanout.
busFanoutDirectionsMaps named buses to preferred escape directions.
fanoutBoundaryPaddingPadding between the source pads and the shared boundary where fanout traces terminate.
fanoutRoutingLayersCopper layers available to boundary-terminated fanout buses.
fanoutPourNetMapMaps plane layers to nets for source-only fanout escapes. Matching copper pours are inferred when omitted.